Glass films are widely used in electronic devices, and, for example, are used as inter-layer insulating films for semiconductors. Glass films can be produced from alkoxy silicon compounds. For example, a glass film can be made through hydrolysis and condensation reaction of an alkoxy silicon compound or an alkylalkoxy silicon compound in the presence of acid or base catalyst (see Patent Document 1 or 2, for example).
Further, the inter-layer insulating film for semiconductor devices is preferably a dense glass film (silicon oxide film) having a high voltage resistance characteristic, and so the film may be produced using the plasma CVD (Chemical Vapor Deposition) method (see Patent Document 3, for example). FIG. 1 is a cross-sectional view showing a configuration of an example of a plasma CVD apparatus. In FIG. 1, substrate 1 is placed upon lower electrode 10 provided inside vacuum container 9. Tetraethylorthosilicate (TEOS), helium and oxygen gas are supplied to substrate 1 through shower head 12 provided under upper electrode 11 from a gas supply device (not shown). The supplied gasses are evacuated by a pump (not shown), and the interior of vacuum container 9 is maintained at a predetermined pressure. High frequency power is supplied to upper electrode 11 with upper electrode high frequency power source 13, and high frequency power is supplied to lower electrode 10 with lower electrode high frequency power source 14.
On the other hand, the method of forming glass films using a paste mixed with glass particles, is also known. According to this method, a relatively thick glass film (approximately 10 μm, for example) can be formed (see Patent Document 4, for example). FIG. 2 shows an example of a flow of forming the film (a flow of forming a glass film in the front side of an AC-type PDP glass substrate of a triode structure).
As shown in FIG. 2A, dielectric paste 31 is applied to glass substrate 1 so as to cover display electrode 30 provided on glass substrate 1. Dielectric paste 31 contains glass particles 32 and liquid substance 33, which are dielectric materials. Glass particles 32 are of a particle size smaller than the thickness of the glass film to be formed. Liquid substance 33 contains binder 34 for bonding glass particles 32 (see FIG. 2B) and a solvent for adjusting the viscosity of the paste. Dielectric paste 31 is kneaded by a general kneading machine, and glass particles 32 are uniformly distributed.
The solvent contained in dielectric paste 31 applied on substrate 1 is evaporated, so that glass particles 32 are bonded by binder 34 (see FIG. 2B). Further, binder 34 is burned and removed by sintering processing, and dielectric layer 35 is obtained (see FIG. 2C). The sintering temperature is set at a temperature where the dielectric material does not melt and not fuse with display electrode 30.
Glass films are used as dielectric layers for plasma display panels (“PDDs”) as well. The surface discharge type PDP of a triode structure shown in FIG. 3 includes: electrode pair 52 comprised of display electrodes X and Y placed adjacently in parallel on front plate 51; and address electrode A, arranged so as to be orthogonal to electrode pair 52. Dielectric layer 53 and protective layer 54 are provided on the back of the display surface of the front plate. The surface discharge cells (i.e. the main discharge cells in the display) are demarcated by display electrodes X and Y, and address discharge cells are demarcated by display electrode Y and address electrode A. The address discharge cells determine whether or not to light the unit light emitting area EU. Phosphor layer 55, provided so as to coat address electrode A, the inner surface of rear plate 56, and the inner surface of partition 57, is excited by ultraviolet rays produced by surface discharge between display electrodes X and Y to emit light. In order to effect full color display, phosphor layers 58R, 58G, 58B of three primary colors, R (red), G (green) and B (blue) are provided for each dot EG forming the display screen (see Patent Document 5).
FIG. 4 is a cross-sectional view where front plate 51 of the PDP shown in FIG. 3 is taken along a plane vertical to the longitudinal direction of display electrodes X and Y. Display electrodes X and Y each consist of transparent conductive film 52 and non-transparent conductive film 59. The dielectric layer is, for example, a glass film.
As one means of improving power efficiency of surface discharge and lowering the driving voltage of the PDP, the relative permittivity of the dielectric layer is lowered and the thickness is made thinner, thereby maintaining the capacitance of the capacitor between the display electrodes and lowering the driving voltage of the PDP. The glass film (silicon oxide film) formed by the CVD method is an example of a dielectric layer of low relative permittivity. The relative permittivity of a dielectric layer formed by a general liquid phase method is in approximately 10 to 13, and the relative permittivity of a dielectric layer formed by a gas phase method such as the CVD method is approximately 4 to 5.
FIG. 5 is a cross-sectional view of an example of PDP in which a glass film formed by the CVD method is used as a dielectric layer (see Patent Document 6). The PDP shown in FIG. 5 has: a front plate comprised of front plate 51, display electrode 52, metal oxide layer 53a, dielectric layer 53, and protective layer 54; and a rear panel comprised of rear plate 56, address electrode A, metal oxide layer 60, dielectric layer 61, partition 57, and phosphor layer 55. A discharge gas is sealed in discharge space 62. On front plate 51 where discharge electrode 52 is provided, metal oxide layer 53a is formed by the CVD method, and in addition, dielectric layer 53 consisting of glass films is formed by the CVD method.
Patent Document 1: Japanese Patent Application Laid-Open No. 2005-108691
Patent Document 2: Japanese Patent Application Laid-Open No. 2003-518318
Patent Document 3: Japanese Patent Application Laid-Open No. 2004-99994
Patent Document 4: Japanese Patent Application Laid-Open No. H11-167861
Patent Document 5: Japanese Patent Application Laid-Open No. H7-320645
Patent Document 6: Japanese Patent Application Laid-Open No. 2003-7217